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00001 /* Copyright (c) 2002, Marek Michalkiewicz 00002 Copyright (c) 2005, 2007 Joerg Wunsch 00003 All rights reserved. 00004 00005 Redistribution and use in source and binary forms, with or without 00006 modification, are permitted provided that the following conditions are met: 00007 00008 * Redistributions of source code must retain the above copyright 00009 notice, this list of conditions and the following disclaimer. 00010 00011 * Redistributions in binary form must reproduce the above copyright 00012 notice, this list of conditions and the following disclaimer in 00013 the documentation and/or other materials provided with the 00014 distribution. 00015 00016 * Neither the name of the copyright holders nor the names of 00017 contributors may be used to endorse or promote products derived 00018 from this software without specific prior written permission. 00019 00020 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00021 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00022 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00023 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 00024 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 00025 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 00026 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 00027 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 00028 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 00029 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00030 POSSIBILITY OF SUCH DAMAGE. */ 00031 00032 /* $Id$ */ 00033 /* copied from: Id: avr/twi.h,v 1.4 2004/11/01 21:19:54 arcanum Exp */ 00034 00035 #ifndef _UTIL_TWI_H_ 00036 #define _UTIL_TWI_H_ 1 00037 00038 #include <avr/io.h> 00039 00040 /** \file */ 00041 /** \defgroup util_twi <util/twi.h>: TWI bit mask definitions 00042 \code #include <util/twi.h> \endcode 00043 00044 This header file contains bit mask definitions for use with 00045 the AVR TWI interface. 00046 */ 00047 /** \name TWSR values 00048 00049 Mnemonics: 00050 <br>TW_MT_xxx - master transmitter 00051 <br>TW_MR_xxx - master receiver 00052 <br>TW_ST_xxx - slave transmitter 00053 <br>TW_SR_xxx - slave receiver 00054 */ 00055 00056 /*@{*/ 00057 /* Master */ 00058 /** \ingroup util_twi 00059 \def TW_START 00060 start condition transmitted */ 00061 #define TW_START 0x08 00062 00063 /** \ingroup util_twi 00064 \def TW_REP_START 00065 repeated start condition transmitted */ 00066 #define TW_REP_START 0x10 00067 00068 /* Master Transmitter */ 00069 /** \ingroup util_twi 00070 \def TW_MT_SLA_ACK 00071 SLA+W transmitted, ACK received */ 00072 #define TW_MT_SLA_ACK 0x18 00073 00074 /** \ingroup util_twi 00075 \def TW_MT_SLA_NACK 00076 SLA+W transmitted, NACK received */ 00077 #define TW_MT_SLA_NACK 0x20 00078 00079 /** \ingroup util_twi 00080 \def TW_MT_DATA_ACK 00081 data transmitted, ACK received */ 00082 #define TW_MT_DATA_ACK 0x28 00083 00084 /** \ingroup util_twi 00085 \def TW_MT_DATA_NACK 00086 data transmitted, NACK received */ 00087 #define TW_MT_DATA_NACK 0x30 00088 00089 /** \ingroup util_twi 00090 \def TW_MT_ARB_LOST 00091 arbitration lost in SLA+W or data */ 00092 #define TW_MT_ARB_LOST 0x38 00093 00094 /* Master Receiver */ 00095 /** \ingroup util_twi 00096 \def TW_MR_ARB_LOST 00097 arbitration lost in SLA+R or NACK */ 00098 #define TW_MR_ARB_LOST 0x38 00099 00100 /** \ingroup util_twi 00101 \def TW_MR_SLA_ACK 00102 SLA+R transmitted, ACK received */ 00103 #define TW_MR_SLA_ACK 0x40 00104 00105 /** \ingroup util_twi 00106 \def TW_MR_SLA_NACK 00107 SLA+R transmitted, NACK received */ 00108 #define TW_MR_SLA_NACK 0x48 00109 00110 /** \ingroup util_twi 00111 \def TW_MR_DATA_ACK 00112 data received, ACK returned */ 00113 #define TW_MR_DATA_ACK 0x50 00114 00115 /** \ingroup util_twi 00116 \def TW_MR_DATA_NACK 00117 data received, NACK returned */ 00118 #define TW_MR_DATA_NACK 0x58 00119 00120 /* Slave Transmitter */ 00121 /** \ingroup util_twi 00122 \def TW_ST_SLA_ACK 00123 SLA+R received, ACK returned */ 00124 #define TW_ST_SLA_ACK 0xA8 00125 00126 /** \ingroup util_twi 00127 \def TW_ST_ARB_LOST_SLA_ACK 00128 arbitration lost in SLA+RW, SLA+R received, ACK returned */ 00129 #define TW_ST_ARB_LOST_SLA_ACK 0xB0 00130 00131 /** \ingroup util_twi 00132 \def TW_ST_DATA_ACK 00133 data transmitted, ACK received */ 00134 #define TW_ST_DATA_ACK 0xB8 00135 00136 /** \ingroup util_twi 00137 \def TW_ST_DATA_NACK 00138 data transmitted, NACK received */ 00139 #define TW_ST_DATA_NACK 0xC0 00140 00141 /** \ingroup util_twi 00142 \def TW_ST_LAST_DATA 00143 last data byte transmitted, ACK received */ 00144 #define TW_ST_LAST_DATA 0xC8 00145 00146 /* Slave Receiver */ 00147 /** \ingroup util_twi 00148 \def TW_SR_SLA_ACK 00149 SLA+W received, ACK returned */ 00150 #define TW_SR_SLA_ACK 0x60 00151 00152 /** \ingroup util_twi 00153 \def TW_SR_ARB_LOST_SLA_ACK 00154 arbitration lost in SLA+RW, SLA+W received, ACK returned */ 00155 #define TW_SR_ARB_LOST_SLA_ACK 0x68 00156 00157 /** \ingroup util_twi 00158 \def TW_SR_GCALL_ACK 00159 general call received, ACK returned */ 00160 #define TW_SR_GCALL_ACK 0x70 00161 00162 /** \ingroup util_twi 00163 \def TW_SR_ARB_LOST_GCALL_ACK 00164 arbitration lost in SLA+RW, general call received, ACK returned */ 00165 #define TW_SR_ARB_LOST_GCALL_ACK 0x78 00166 00167 /** \ingroup util_twi 00168 \def TW_SR_DATA_ACK 00169 data received, ACK returned */ 00170 #define TW_SR_DATA_ACK 0x80 00171 00172 /** \ingroup util_twi 00173 \def TW_SR_DATA_NACK 00174 data received, NACK returned */ 00175 #define TW_SR_DATA_NACK 0x88 00176 00177 /** \ingroup util_twi 00178 \def TW_SR_GCALL_DATA_ACK 00179 general call data received, ACK returned */ 00180 #define TW_SR_GCALL_DATA_ACK 0x90 00181 00182 /** \ingroup util_twi 00183 \def TW_SR_GCALL_DATA_NACK 00184 general call data received, NACK returned */ 00185 #define TW_SR_GCALL_DATA_NACK 0x98 00186 00187 /** \ingroup util_twi 00188 \def TW_SR_STOP 00189 stop or repeated start condition received while selected */ 00190 #define TW_SR_STOP 0xA0 00191 00192 /* Misc */ 00193 /** \ingroup util_twi 00194 \def TW_NO_INFO 00195 no state information available */ 00196 #define TW_NO_INFO 0xF8 00197 00198 /** \ingroup util_twi 00199 \def TW_BUS_ERROR 00200 illegal start or stop condition */ 00201 #define TW_BUS_ERROR 0x00 00202 00203 00204 /** 00205 * \ingroup util_twi 00206 * \def TW_STATUS_MASK 00207 * The lower 3 bits of TWSR are reserved on the ATmega163. 00208 * The 2 LSB carry the prescaler bits on the newer ATmegas. 00209 */ 00210 #define TW_STATUS_MASK (_BV(TWS7)|_BV(TWS6)|_BV(TWS5)|_BV(TWS4)|\ 00211 _BV(TWS3)) 00212 /** 00213 * \ingroup util_twi 00214 * \def TW_STATUS 00215 * 00216 * TWSR, masked by TW_STATUS_MASK 00217 */ 00218 #define TW_STATUS (TWSR & TW_STATUS_MASK) 00219 /*@}*/ 00220 00221 /** 00222 * \name R/~W bit in SLA+R/W address field. 00223 */ 00224 00225 /*@{*/ 00226 /** \ingroup util_twi 00227 \def TW_READ 00228 SLA+R address */ 00229 #define TW_READ 1 00230 00231 /** \ingroup util_twi 00232 \def TW_WRITE 00233 SLA+W address */ 00234 #define TW_WRITE 0 00235 /*@}*/ 00236 00237 #endif /* _UTIL_TWI_H_ */